• Technical Conference:  16 – 20 September 2018
  • Science & Industry Showcase:  18 – 19 September 2018

A Day of Data

So it seems the theme of my day today was ways to address size and energy bottlenecks in data centers. I’ve thoroughly had it drilled into my head that the real scale of interest is on the interconnect level, between chips and even on chips. As pointed out in an excellent tutorial by David Miller of Stanford University, the parasitic capacitance of electronic lines results in a large energy consumption, in fact much larger than the logic operations being performed by the CMOS itself. So this is where photonics can really save the day.
 
To really push the envelope on low energy consumption, optical devices need to be especially small to avoid capacitance issues in devices such as modulators and threshold losses in lasers. In fact, according to Prof. Miller, one can start thinking about femtojoule to attojoule per bit energy consumption for photonic devices of submicron size! This really encourages the push for nanoscale photonics, such as tiny lumped-element modulators, high quality factor cavities, and low mode volume lasers.
 
And another important aspect of this is then to integrate the photonics with the electronics (remember, in general the key is to keep sizes and distances small wherever possible). In a previous post I discussed a little bit of how this is done with silicon photonics. A session this morning focused on the other angle of attack, hybrid integration. With hybrid integration, one uses a variety of materials, in particular the ones best suited for the different photonic/electronic components. Then all of these materials are brought together into a single chip by some sort of bonding or deposition method (there are a variety of techniques). For example, we all know our electronics will be in silicon, but then we maybe want efficient lasers in indium phosphide, modulators made with organic semiconductors, or phase shifters implemented with liquid crystals. Putting these pieces together is the topic of hybrid integrated photonics.
 
The hybrid integrated photonics sessions consisted of a number of excellent talks. They covered topics such as how to use grayscale lithography to make vertical couplers, how to address issues of large packaging costs for hybrid photonics by creating a standard “toolbox” of integration techniques, how to functionalize silicon for active photonics by using organic materials, and how to make cheap and flexible “photonic wire bonds” for alignment tolerant chip-to-chip interconnects. What I noticed was a collection of really innovative ideas that seem to be on track to make hybrid photonics a particularly appealing technology. In particular, I think the concepts I saw appear to really address how to make hybrid integration flexible, cost effective, and size and power efficient.

See caption below
(a) Fabrication, (b) SEM image, and (c) performance of a photonic “wire bond.” (C. Koos, et al., “Silicon-
organic hybrid integration and photonic wire bonding: Enabling technologies for heterogeneous photonic systems,”
presented at Frontiers in Optics 2013).


From what I’ve seen over the past couple of days, I really believe the community has nailed down the essential issue at hand for the continued expansion of big data and the internet. The arguments for integrated photonics seem to continue to get stronger. And the research seems furious to find the right approaches, with a wide variety of innovative ideas being pursued. With this continued development, I look forward to seeing how far photonics will go in advancing our information superhighway.
 
Disclaimer: Opinions, interpretations, conclusions, and recommendations are those of the author and are not necessarily endorsed by the United States Government and MIT Lincoln Laboratory.

Posted: 10/9/2013 8:11:34 AM by By Dominic Siriani | with 0 comments

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